on Workshop on VLSI Design Verification"
29th & 30th of July 2010
About the Workshop
The VLSI Design Verification is the core subject introduced in the new scheme of VLSI Design & Embedded System course in
M.Tech for the first semester of VTU. This workshop is intended to provide an insight in to the subject of VLSI Design Verification for both the faculty and P G students.
The complexity of the VLSI integrated circuits that are being designed today is so large that pre-silicon verification presents a
major challenge to the design team. The fact that IP from multiple sources are integrated today to create a system-on-chip design further complicates the matter. Formal specification and verification techniques are ways to address the challenges of
design verification. The workshop covers the ASCI Flow,
Verification, STA, physical design verification, IP reuse / Verification of IP based design.
ABOUT PHLOX SEMICONDUCTORS
PHLOX Semiconductor Pvt Ltd. was founded by a group of core chip-design experts who are credited to have held senior
positions in the industry producing several cutting edge ASICs in the area of networking, communication and programmable
solutions. As a part of its educational vertical, PHLOX-VLSI ACADEMY was created to provide an industry driven training
services centre in the area of ASIC/FPGA and Embedded systems.
With a passion to nurture talented chip designers, the PHLOX is providing various courses for aspiring students to enter and succeed in ever developing field of IC design.
- Key Note Address
- ASIC Flow / Introduction to Verification& flow
- System Level Verification
- Physical Design verification
- IP Reuse/Verification of IP Based design
Last Date for receipt of application - 22.07.2010
Confirmation to participants by e-mail - 24.07.2010
Registration - 29.07.2010 at 08:30 AM
Inauguration - 29.07.2010 at 09:00 AM
Whom to Contact ?
Faculty, Department of ECE, Reva ITM
Kattigenahalli, Yelahanka, Bangalore 560064
Mobile: 9886676136, 9986120948
Download Registration form